Signatec has announced the launch of the PDA16 high-speed digitiser, an advanced wideband and high dynamic range A/D board with FPGA processing.
The PDA16 is designed to meet demanding high-speed data acquisition, signal data recording and real-time FPGA processing applications.
It leverages the processing performance of Xilinx Virtex FPGAs with embedded PowerPC processors.
As a Xilinx Alliance Programme partner, Signatec can create customised development tools for users to perform real-time processing on digitised, high-speed, high-resolution signal data.
The PDA16 has 512MB of on-board memory configured as a large FIFO and a 64-bit PCI-X bus.
It can sustain up to two channels recording at 160msps per channel and transfer the digitised and/or processed data to PC disk storage at rates up to 640MB/s without any break in the analogue record.
The PDA16's ultra-wide bandwidth capacity of up to 500 MHz allows users to accurately capture frequencies in baseband or in much higher-order Nyquist zones using under-sampling techniques.
The PDA16 comes with either a Virtex-4 FX20 (one immersed IBM PowerPC 405 processor) or an FX60 FPGA (two immersed IBM PowerPC 405 processors).
Using the Virtex-4 FX FPGA's auxiliary processor unit (APU) controller, designers can simplify the integration of hardware accelerators and coprocessors.
The Virtex-4 FPGAs also come equipped with 12 to 16 RocketIO serial transceivers, each providing 622Mbps to 6.5 Gbps, full duplex operation.
The PDA16 was designed to maximise the quality of captured signals in terms of signal-to-noise ratio (SNR) and spurious-free dynamic range (SFDR) over a wide frequency range.
When utilising the transformer-coupled inputs to the ADC, 100 dB SFDR performance levels for input frequencies over 100 MHz are obtainable and most input frequencies from 5 MHz to 200 MHz are 87 dB or better for SFDR.
The PDA16 offers users an accurate synthesised clock to tune ADC sampling rates to any clock up to 125 MHz, and most other frequencies up to 160 MHz.
This frequency selection flexibility comes at no cost to the acquisition clock quality/performance when locked to either the onboard 10 MHz, 5 PPM reference clock or to an externally provided 10 MHz reference clock.
In addition to the onboard clock capabilities, the ADC may also be clocked from an external clock source.
Up to four PDA16 boards may be interconnected in the standard master/slave configuration via a ribbon cable that connects at the top of the board.
In this configuration, the clock and trigger signals from the master board drives the slave boards so that data sampling on all boards occurs simultaneously.
Greater synchronisation and scalability can be achieved with separate clock/trigger board modules that expand the synchronised clock and trigger signals to much higher counts allowing for up to 64-board systems.
